Many data processing systems include multiple microprocessors, devices, and memories, where each performs transactions using a common set of buses. When the address bus and the data bus are split, it is possible to reorder data to maximize the use of the data bus. In a split transaction bus such as this, the address tenure is the period of time during which the address for a given transaction is valid on the address bus, and the data tenure is the period of time during which data for a given transaction is valid on the data bus. The address tenures are provided in a first order, while the data tenures may be reordered to optimize the transmission of data. This is useful, for example, when a long transaction (i.e. a transaction which requires multiple cycles to perform) is followed by several shorter transactions. As the recipient of the data does not always have access to the reordering scheme, it is necessary to provide a mechanism for identifying the data with its corresponding address.
Some split transaction bus systems use bus protocols having a static tagging mechanism, where an identifier is attached to each address and then a corresponding identifier is attached to each data. Such static tagging methods require a unique tag be broadcast with the address during the address tenure. The tag is then stored by the device which is targeted in the transaction. In some systems the tag is also stored in a system arbitration controller. When the corresponding data is selected the tag is rebroadcast along with the data during the data tenure. In this case, both the address bus and the data bus must be expanded for provision of the tag information. The tag information is provided for a single transaction to both the data source (i.e. the device providing the data) and the data sink (i.e. the device receiving the data).
There is a need for a method of identifying address and data combinations which does not require the additional overhead of providing tag information with the address tenure.